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 BC059 Generic Digital IO Board
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The BC-059 board was developed by Steve Ross of the Detector Pool for beamline
applications requiring nanosecond response time, such as CCD shutter timing or
counting motor pulses. When used with the BC-068 daughter board, it can function
as a 16ch Scaler. It can serve as a standalone unit or be controlled by EPICS
using the SerialLink protocol through either an EBRICK or a VME system using
a Unidig IP module.

The board consists of the following features:
- Altera FLEX10K FPGA.
- 16 buffered TTL-level digital outputs for LEDs.
- 24 buffered TTL-level digital IO pins connected to terminal blocks and J3.
- 24 buffered TTL-level digtial IO pins connected to JEB1.
- 18 unbuffered TTL-level digtial IO pins connected to J22.
- 8 DIP switch input pins.

The FPGA is programmed by using Altera's Quartus-II software application. The
application is available as part of the subscription service or can be downloaded
free from the Altera web site. Refer to the Altera website (www.altera.com) for
additional information. BCDA and the Detector Pool have many sample designs that
could be used as a departure point.