Motor Record: Known problems with Release 6-3

  1. The OMS VME58 "stale data" problem is caused by the driver communicating via the ASCII commands while the DPRAM was updating. The OMS VME58 driver was modified with R6-3 to eliminate this contention and the "stale data delay" was set to zero. Since then a problem with OMS VME58 2.24-8S version firmware and all 2.35 firmware versions has arisen. When the user sets the motor record's position, the previous target and readback positions are read from the controller on the next update.

    With releases after R6-3 (e.g., R6-3-1 and R6-4) the driver searches all VME58 board ID's for either 2.24-8S or any 2.35 version. If any board is found, the "stale data delay" is set to a non-zero value.

  2. A problem was reported by Emma Shepherd (Diamond) with R6-3 if the "Use RDBL Link" field (URIP) was set to "Yes". The NTM logic was sending stop commands and issuing the "tdir=.." message to the console if the RDBL link was used. This error was the result of changing the NTM logic as described in item #11 under R6-3 modifications.

    With releases after R6-3 (e.g., R6-3-1 and R6-4), the NTM logic is restored to using feedback rather than reference positions. In addition, with release R6-4 and after, an "NTM deadband factor" field (NTMF) is added to allow the user to set the NTM deadband; NTM deadband = NTMF * (|BDST| + RDBD) NTMF must be >= 2. If properly configured, the NTM deadband prevents NTM logic from issuing a STOP command at the end of a DC motor move that overshoots its' target position.

  3. The asyn motor device driver architecture does not support the motor record GET_INFO command. Hence, operations that require a status update (i.e., setting the position) were not working. This is fixed in R6-4.
  4. In the process of fixing the OMS VME58 "stale data" problem described above, needless delays were added to the code that updated the VME58's DPRAM. These needless delays can be calculated as follows;

    delay = (n-1) * (1/sysClkRate)

    where, n = # of VME58 boards in the IOC.
    sysClkRate = 60 Hz, unless changed by a sysClkRateSet() from st.cmd.

    These delays are eliminated with R6-4-2 and above.