EPICS Home

Experimental Physics and Industrial Control System


 
2002  2003  2004  2005  2006  2007  2008  2009  2010  2011  2012  2013  2014  2015  2016  2017  2018  2019  2020  2021  <20222023  2024  Index 2002  2003  2004  2005  2006  2007  2008  2009  2010  2011  2012  2013  2014  2015  2016  2017  2018  2019  2020  2021  <20222023  2024 
<== Date ==> <== Thread ==>

Subject: Re: Integration work on EPICS7 and RTEMS6 libbsd
From: Heinz Junkes via Core-talk <core-talk at aps.anl.gov>
To: Matt Rippa <matt.rippa at noirlab.edu>
Cc: Core talk <core-talk at aps.anl.gov>
Date: Thu, 10 Mar 2022 12:48:38 +0100
Hello Matt,
some progress has been made in the last days.
I can build the MVME6100 from the RTEMS master and boot it already.
There are still a few patches to apply and I have to clean everything up a bit.
I have not tested NFS yet. That will be next.
Greetings Heinz

Bytes Received =&2679544, Bytes Loaded =&2679544
Bytes/Second   =&2679544, Elapsed Time =1 Second(s)
MVME6100> waitProbe
System I/O Probe Complete
MVME6100> netShut
/dev/enet0    -----------------------------------------
config addr is 0xf1000cf8
config data is 0xf1000cfc
Welcome to RTEMS rtems-6.0.0 (PowerPC/Generic (classic FPU)/beatnik)
CPU: MPC7457
Board Type: MVME6100-0163 (S/N D00967A)
Bus Clock Freq:   133333333 Hz
CPU Clock Freq:  1266666654 Hz
Memory:           536870912 bytes
-----------------------------------------
Now BSP_mem_size = 0x1fe00000
Configuration.work_space_size = 34cb0
Page table setup finished; will activate it NOW...
Going to start PCI buses scanning and initialization
Number of PCI buses found is : 3
MSR 0x2003032
Exit from bspstart
unable to find the universe in pci config space
Tundra Tsi148 PCI-VME bridge detected at 0x81100000, IRQ 84
Tsi148 Outbound Ports:
Port  VME-Addr   Size       PCI-Adrs   Mode:
0:    0x20000000 0x0e000000 0x90000000 A32, SUP, D32, SCT
1:    0x00000000 0x00ff0000 0x9f000000 A24, SUP, D32, SCT
2:    0x00000000 0x00010000 0x9fff0000 A16, SUP, D32, SCT
7:    0x00000000 0x01000000 0x9e000000 CSR, SUP, D32, SCT
Tsi148 Inbound Ports:
Port  VME-Addr   Size       PCI-Adrs   Mode:
0:    0x90000000 0x1fe00000 0x00000000 A32, PGM, DAT, SUP, USR, MBLT, BLT
vmeTsi148 IRQ manager: looking for registers on VME...
Trying to find CSR on VME...
vmeTsi148 - IRQ manager using VME CSR to flush FIFO
Registering /dev/console as minor 0 (==/dev/ttyS0)
Backwards time errors prevented 0 times.

Current Time ProvideWrAsR:N
I N G :  "OOSS  CClloocckk "t,i mper iwoarsi trye a=d  9b9e9f
o      rCeu rbreeinntg  Tsiemte.
iUss i1n9g9 01-90910--0021 -0002: 0000::0000.:00102.005080.0
0
0E vUeTnCt
 Time Providers:
        No Providers registered.
# mask syslog() output

***** epicsThreadTest *****
1..15
# System has 1 CPUs
ok  1 - ncpus > 0
# main() thread 0x2d1a60
ok  2 - Join delayed parent (2.00997 seconds)
ok  3 - Join tests #1 completed
ok  4 - Join delayed parent (2.00997 seconds)
ok  5 - Join tests #2 completed
ok  6 - pget == pset
ok  7 - pget == pset
ok  8 - thread.getPriority() == epicsThreadGetPriority(self)
ok  9 - thread.getPriority() == epicsThreadGetPriority(self)
ok 10 - pget == pset
ok 11 - thread.getPriority() == epicsThreadGetPriority(self)
ok 12 - threadA epicsThreadIsOkToBlock() = 0
ok 13 - threadB epicsThreadIsOkToBlock() = 1
ok 14 - infoB.didSomething
ok 15 - infoA.didSomething

    Results
    =======
       Tests: 15
      Passed:  15 = 100.00%

***** epicsTimerTest *****
1..41
ok  1 - Q1==Q2
# Testing timer accuracy
ok  2 - timerCount == nTimers
ok  2 - Join delayed parent (2.00997 seconds)
ok  3 - Join tests #1 completed
ok  4 - Join delayed parent (2.00997 seconds)
ok  5 - Join tests #2 completed
ok  6 - pget == pset
ok  7 - pget == pset
ok  8 - thread.getPriority() == epicsThreadGetPriority(self)
ok  9 - thread.getPriority() == epicsThreadGetPriority(self)
ok 10 - pget == pset
ok 11 - thread.getPriority() == epicsThreadGetPriority(self)
ok 12 - threadA epicsThreadIsOkToBlock() = 0
ok 13 - threadB epicsThreadIsOkToBlock() = 1
ok 14 - infoB.didSomething
ok 15 - infoA.didSomething


Viele Grüße
Heinz Junkes
--
Experience directly varies with equipment ruined.



> On 8. Mar 2022, at 00:26, Matt Rippa <matt.rippa at noirlab.edu> wrote:
> 
> Hi Heinz,
> 
> Any special configuration to build EPICS with libbsd? I will try building with RTEMS-beatnik .
> 
> Thanks,
> -Matt
> 


Navigate by Date:
Prev: Re: Definition (or not) of alarm limits Timo Korhonen via Core-talk
Next: unknown type name 'DBLINK' Heinz Junkes via Core-talk
Index: 2002  2003  2004  2005  2006  2007  2008  2009  2010  2011  2012  2013  2014  2015  2016  2017  2018  2019  2020  2021  <20222023  2024 
Navigate by Thread:
Prev: Re: Definition (or not) of alarm limits Timo Korhonen via Core-talk
Next: unknown type name 'DBLINK' Heinz Junkes via Core-talk
Index: 2002  2003  2004  2005  2006  2007  2008  2009  2010  2011  2012  2013  2014  2015  2016  2017  2018  2019  2020  2021  <20222023  2024