Re: A simple EPICS driver example for PCI devices using asynPortDriver on Linux

["Perez Juarez, Emilio \(DLSLtd, RAL, LSCI\) via Tech-talk" <tech-talk at aps.anl.gov>]

Hi Lin Wang and thanks for sharing,

I have some comments/questions:

• Is there a reason why you prefer to use ioctl for register access instead of mmap and letting userspace access directly?
• I know security is usually not a priority, but I've noticed you don't check/validate the register offset passed in the ioctl syscall, which means it could give access to other resources (memory or I/O)
• You might want to provide a fallback path when the target system doesn't have your kernel module installed, in which case, you can get register access by mmap'ing /sys/bus/pci/devices/<X>/resource<Y>, where <X> is the domain:bus:devices.function of your device and <Y> is the BAR number you want to access
• I noticed you dereference a volatile pointer to access the registers, in kernel space I'd recommend using the functions ioread<X> or iowrite<X> instead, where <X> is the access size (8, 16 or 32). This will make code more portable.
  

I hope any of that was useful,

Kind Regards,

Emilio

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From: Tech-talk <tech-talk-bounces at aps.anl.gov> on behalf of Wang, Lin via Tech-talk <tech-talk at aps.anl.gov>
Sent: 02 December 2022 10:15
To: tech-talk at aps.anl.gov <tech-talk at aps.anl.gov>
Subject: A simple EPICS driver example for PCI devices using asynPortDriver on Linux

 

Dear all,

A simple EPICS driver example for PCI devices using asynPortDriver on Linux is shared in the following GitHub link in case somebody might be interested,

https://github.com/wanglin86769/cpciEpicsApp

This is an EPICS IOC developed for the LLRF system of a small-scale accelerator facility at CSNS campus. The LLRF board is a customized cPCI FPGA board with PCI 9056 bridge, the control interface is merely register access plus waveform read with 1 second update period, no interrupt or DMA is needed.

The Linux driver part is implemented as kernel module rather than UIO (Userspace I/O). This example is only useful for simple customized PCI devices that does not need interrupt and DMA, and only one MMIO (Memory mapped I/O) BAR is used to access the FPGA registers.

This is my first assignment to control PCI under Linux rather than vxWorks, any suggestion is appreciated.

Regards,

Lin Wang

Staff Engineer

Controls Group, Accelerator System Division, CSNS (China Spallation Neutron Source)

IHEP (Institute of High Energy Physics), Chinese Academy of Science

 

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