Re: Reading a synchronous input with an asynchronous device.

[Ned Arnold <nda@aps.anl.gov>]

Two suggestions ...

1) Since you are looking for a transition, choose a TTL input module 
whose inputs can be configured to generate an interrupt on a 
transistion, have this interrupt process a calc record that simply 
increments, and have another calc record that makes sure the first calc 
record increments at least 100 times over a second (or 10 times every .1 
second).

2) OR, add a little FPGA circuit (or a timer relay) that expects a 
transition every 10 milliseconds (a simple watchdog) and use this output 
to drive the digital input. This is preferred because it eliminates 
100Hz processing of records.


	Ned




Emmanuel Mayssat wrote:
> I am convinced that some of you were faced with the same situation where 
> you had to read a timed input with an asynchronous device.
> Well, apparently I am no different and would like to know what your 
> suggestions are.
>
> Here is my situation:
>
> The input signal is binary and periodic with period T=10ms.
> The duty cycle is ~60% ( or the TTL level high is maintained for 6ms 
> while the TTL level low is maintained for the remaining of T)
>
> If the signal becomes aperiodic ( always TTL high or TTL low ) then 
> there is  an error ( wrong cable connection or device error )
>
> I have an epics driver for the asynchronous device (binary input).
>
> Here are the solutions I came across:
>
> 1/ The obvious one: write a new epics driver that will query the binary 
> input 10 times over 10 ms. If I get at least a 1 and a 0 then everything 
> is ok => pbi->val=1
>
> 2/ I looked at soft records that could run on the top of the existing 
> INSTIO record. That is my prefered way.
> I came accross the seq record in the record manual. Is it an appropriate 
> use for it? Am I on the right direction?
>
> Do you have any other suggestions?
>
> Thanks,