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Memory Mapped I/O

Files

file  epicsMMIODef.h
 Memory Mapped I/O.
 
#define rbarr()   do{}while(0)
 Explicit read memory barrier Prevents reordering of reads around it.
 
#define wbarr()   do{}while(0)
 Explicit write memory barrier Prevents reordering of writes around it.
 
#define rwbarr()   do{}while(0)
 Explicit read/write memory barrier Prevents reordering of reads or writes around it.
 

Detailed Description

Safe operations on I/O memory.

This files defines a set of macros for access to Memory Mapped I/O

They are named T_ioread# and T_iowrite# where # can be 8, 16, or 32. 'T' can either be 'le', 'be', or 'nat' (except ioread8 and iowrite8).

The macros defined use OS specific extensions (when available) to ensure the following.

PCI access should use either 'le_' or 'be_' as determined by the device byte order.

VME access should always use 'nat_'. If the device byte order is little endian then an explicit swap is required.

Examples:

Big endian device:

PCI

be_iowrite16(base+off, 14);
var = be_ioread16(base+off);

VME

nat_iowrite16(base+off, 14);
var = nat_ioread16(base+off);

Little endian device

PCI

le_iowrite16(base+off, 14);
var = le_ioread16(base+off);

VME

nat_iowrite16(base+off, bswap16(14));
var = bswap16(nat_iowrite16(base+off));

This difference arises because VME bridges implement hardware byte swapping on little endian systems, while PCI bridges do not. Software accessing PCI devices must know if byte swapping is required. This conditional swap is implemented by the 'be_' and 'le_' macros.

This is a fundamental difference between PCI and VME.

Software accessing PCI must do conditional swapping.

Software accessing VME must not do conditional swapping.

Note
All read and write operations have an implicit read or write barrier.