Experimental Physics and Industrial Control System
Hi,
In Message-Id: <[email protected]>, Furukawa-san wrote,
>Hello Yamamoto-san,
>
>I'm sorry for my late message.
>
>>>> In message <[email protected]> , Noboru Yamamoto <[email protected]> wrote;
>
>> After I sent a question to tech-talk, we found the following fact:
>>
>> 1) NI-1014 DMA can access VME address in A24 mode.
>> 2) To accesse Main memory on FORCE cpu40 via VME bus, address mode
>> should be A32 mode.
>>
>> These facts means that the standard GPIB support routines in EPICS does not
>> work for this combination of boards. We happened to have memory board for VME
>> bus and allocated buffer space GPIB driver on this memory board. After that,
>> GPIB support routines are working.
>
>Force CPU40 has A24 slave capability, while CPU30 does not.
>Actually the A24 slave capability is implemented on an external
>circuit outside VME gate array (FGA-002) for CPU30/40. Thus
>it isn't explained in the documentation of FGA-002 but in one
>of CPU-40.
>
>I use this sort of code fragment (on OS9) to initialize A24
>slave access for A24 DMA.
>
> p = (uchar *)0xff800c00; /* pointer to PI/T1 */
> *(p+0x03) = 0xff; /* PB all output, PBDDR */
> *(p+0x09) = 0x80; /* upper address in A24, PBDR */
> p = (uchar *)0xff800e00; /* pointer to PI/T2 */
> *(p+0x04) = 0xa8; /* PC7 output, PCDDR */
> *(p+0x0c) = 0x7e; /* enable A24 slave, PCDR */
>
>This way, you may eliminate an external memory board.
>
>Regards, Kazuro.
>
OK. I read CPU-40/41 User's Manual carafully and found that it states
its A24 slave capability.
However, I could not find the way to use the "niPhysIo" routine in drvGpib.c
for our configuration, yet. It uses VxWorks system function, sysLocalToBusAdrs,
to translate local(CPU) memory address to VME bus address with
VME_AM_STD_SUP_DATA as a first argument. The function "sysLocalToBusAdrs"
returns ERROR, when it is called with VME_AM_STD_SUP_DATA, in VxWorks
for FRC40.
I need to consider little bit more to solve this problem with
the least changes in the code.
Thank you for your advice.
Noboru Yamamoto
KEKB acclerator control group.
KEK, JAPAN
- Navigate by Date:
- Prev:
Re: Analogue output simulation link SIOL Nick Rees
- Next:
ezca under VMS? William Lupton
- Index:
1994
<1995>
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
- Navigate by Thread:
- Prev:
Re: Q: NI-1014 GPIB board with Force CPU40. Kazuro FURUKAWA
- Next:
output record initialization William Lupton
- Index:
1994
<1995>
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024