Re: PPC603 / PPC604 differences?

[Till Straumann <strauman@slac.stanford.edu>]

IIRC a significant difference is that the 604 features TLB lookup
in hardware whereas the 603 does not. Hence, using the MMU for
paged mappings is prohibitive on a 603 under a RTOS so you're stuck
with the BATs.

Also, IIRC, the 603 does not feature a DABR ('data access breakpoint' - 
you can let the CPU raise an exception when a breakpoint address is
loaded or stored) register which is very helpful for debugging certain
things.

Regarding the instruction set there are also minor differences.

Certainly, both CPUs support the mandatory PPC UISA instruction set.
Hence, if you compile code with -mcpu=powerpc then it should execute
on either of the CPUs.

However, the 604 e.g., implements fsqrt/fsrqts (FP square-root in
hardware) which are enabled when you compile with
-mdouble-float/-msingle-float (or implicitly when you use -mcpu=604)
There may be other optional instructions that the 604 has and the
603 does not and which you may want to use if you have a 604.

The cache size of the 603 is smaller than the 604's.

HTH
-- Till


On 07/07/2011 11:10 AM, Andrew Johnson wrote:
> Hi Dirk,
>
> On 2011-07-07 Dirk Zimoch wrote:
> > Can anyone tell me the differences between ppc603 and ppc604 from the
> > software point of view? Are there instructions that one type supports
> > and the other doesn't?
>
> I think the main differences are some of the special-purpose registers (SPRs)
> that are accessible at Supervisor level, used for obscure things like
> performance monitoring and power or thermal management.  The basic instruction
> set is common to all 32-bit PowerPC CPUs, so it's only if you're doing BSP-
> level things like turning Caches on/off or programming the MMU that the
> differences really matter.  The SPRs are accessed using the mtspr and mfspr
> instructions.  There are also a few optional and implementation-specific
> instructions that the two Microprocessor Technical Summary documents I found
> online mention briefly.
>
> I added two new target architectures to Base 3.14.12.1, vxWorks-ppc32 and
> vxWorks-ppc32sf (soft-float) so sites don't have to compile the code more than
> is really necessary.  Here at APS we're using them as part of our switch to
> vxWorks 6.8, so our engineers can convert IOCs to 3.14.12.1 using the old
> targets on vxWorks 5.5.2, but then switch to 6.8 using the same release of
> Base with the new targets so we can separate out any issues due to the OS-
> version.
>
> HTH,
>
> - Andrew