Experimental Physics and
Industrial Control System

[email protected] (Bob Dalesio) · Wed, 24 Aug 94 08:30:13 MDT

The software latency will be the sum of the interrupt latency (was 3us on a 68020) a context switch (was 30 usec on a 68020) and record processing (about
80 usec each on the 68040). Minimum latency is acheived by running the record from this on an event scan list at high priority. This is the highest priority
in the system. Only several vxWorks tasks run higher. The most devious one
being the shell task. If someone is logged in and invoking diagnostic routines,
then all bets are off.

The LANL timing hardware would also handle this problem. It has a 5 Mhz clock
and ~500 nansecond jitter. It is a much simpler design that the ANL timing as
it only has three types of events: no sequence RAM, no programmed events.
This proved adequate for our LINAC which was pulsed at 10 Hz. These boards
are relatively inexpensive, but not appropriate if you want to be generating
events at greater than 100 Hz. The limitation is in the software, not the 
clock generator.

	Bob

Experimental Physics and Industrial Control System

Experimental Physics and
Industrial Control System