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<== Date ==> <== Thread ==>

Subject: RE: EPICS on cPCI/PPC
From: johill@lanl.gov (Jeff Hill)
To: "'Bill Brown'" <wlbrown@lbl.gov>, tech talk <tech-talk@aps.anl.gov>, "akbiocca@lbl.gov" <akbiocca@lbl.gov>
Date: Wed, 20 Jan 1999 10:17:00 -0700
On Thursday, January 14, 1999 4:35 PM, Bill Brown [SMTP:wlbrown@lbl.gov] wrote:
> A couple of symbols get noted as "undefined" at load time;
> sysIntEnable() and sysIntDisable().  I kind of thought that stuff
> in sysLib was supposed to at least have entry points, even if they
> don't do anything.  This did not keep iocInit from completing,
> however.

It appears that WRS only implements sysIntEnable() and 
sysIntDisable() on VME bus systems.

On PC systems sysIntEnablePIC (intLevel) is used to enable
interrupts in the Programmable Interrupt Controller (PIC) chip.
Since this routine assumes ISA style interrupt routing on the mother
board we can only hope that WRS is forthcoming with improved
interrupt support for PCI bus systems which will presumably allow
for more sophisticated interrupt vector assignment to PCI devices
on the motherboard.

Jeff

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