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<== Date ==> <== Thread ==>

Subject: RE: ATC40 & R3.13.1
From: johill@lanl.gov (Jeff Hill)
To: "Dmitrovskiy Alexei" <dmitrov@mail.desy.de>
Cc: "EPICS-tech-talk" <tech-talk@aps.anl.gov>
Date: Wed, 5 Apr 2000 09:20:15 -0600
Hello Alexei,

Perhaps this crash occurs because the object code is not, by default,
optimized in your beta11 build and it is in your R3.13.1 build. Be careful to use
the "volatile" keyword to declare structures that overlay hardware (or pointers 
to registers). I will send a copy of the source code that we use for ATC40 
support here if you are interested. As I recall there were some subtleties related 
to getting the interrupt support correct.

Jeff

> -----Original Message-----
> From: Dmitrovskiy Alexei [mailto:dmitrov@mail.desy.de]
> Sent: Wednesday, April 05, 2000 3:11 AM
> To: tech-talk@aps.anl.gov
> Subject: ATC40 & R3.13.1
> 
> 
> Hello,
> 
> I use ATC40 PC ISA board as a carrier for IP modules. The OS is vxWorks. The
> original software (a new EPICS record, corresponding record and device
> supports, a hardware driver) was written for EPICS 3.13 beta11 and it works
> under this version without problems.
> My IP module has two interrupts. The peculiarity of interrupt usage is that
> it is necessary to write a zero (disable) followed by a one (enable) to
> INTERRUPT_EN register to generate a low to high transition for other pending
> IP interrupts after the current interrupt service routine is exited.
> So the problem is the following:
> - when I port my code to final EPICS release (3.13.1) and run it on PC, I
> get a crash during the first interrupt appearance even without any
> diagnostic message (but it works with MVME162);
> - if throw writing 0 (disable) to INT_EN register out of the ISR, no chances
> to process second interrupt, but there is no crash;
> - if I download everything from final EPICS release EXCEPT driver (the code
> is absolutely the same) which I take from beta 11, it works!
> A note: a driver object file from beta11 is about five times bigger than one
> from 3.13.1 (the same code and compiler). This is not usual for other
> architectures (for example, mv162/cc68k).
> 
> Could anyone explain this behaviour? Thanks in advance.
> 
> Alexei.
> 
> 
> 


References:
ATC40 & R3.13.1 Dmitrovskiy Alexei

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