Here is what you need
line 1:4379C02B
line 2:04/27/94
line 3:167 U1 or 167 U2.
You need both U1 and U2.
I have a bunch of sets. I can send you a set if you need them.
Brad Cumbia
Accelerator Network Administrator/Senior Controls Technologist
Thomas Jefferson National Accelerator Facility
Electrical Engineering Support Group
Instrumentation & Control Systems
Accelerator Computing Environment
12000 Jefferson Avenue
Newport News, Virginia 23606
Phone (757)269-5839
Pager (757)584-5839
Fax (757)269-7309
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Steven Hartman wrote:
one, I can't tell if this is it or not. On the PROM itself, it says
"MVME 167 U2 5.02b". Does anybody have one that you can check with??
If I recall correctly, the U2 chip you have is an old VxWorks PROM
(version 5.02b), not the Motorola one.
- Replies:
- Re: Original Motorola MVME 167 PROM Jiro Fujita
- References:
- RE: Original Motorola MVME 167 PROM Hammonds, John P.
- RE: Original Motorola MVME 167 PROM Steven Hartman
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MVME5500/Kate Feng wrote : > Anyway, the reason why I wanted to > clarify is that there is a cavet about the MVME5500 board, which is > due to its Discovery I system controller. It is a different issue fromwhat was discussed about the dummy read. > * Some PCI devices require Synchronization Barriers or PCI ordering > * for . For example, the VME-OMS58 motor controller we > * used at NSLS requires either enhanced CPU Synchronization Barrier > * or PCI-ordering (only one mechanism is allowed) for the PCI-write. > * The PCI-ordering simply implements a PCI conMVME5500/100 PCI sync. (was Re: Dev lib off-board register access) Kate Feng
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