Re: VME Bus Error handling on MVME3100 and 6100 boards

[Andrew Johnson <anj@aps.anl.gov>]

Kate Feng wrote:
> This  read cycle could happen before the ISR and accidentally update
> a value. What I meant is that  "Can the bus error handler detect that
> and reverse the update?"  I guess it does not matter because the wrongly
> updated value will not get updated to the EPICS save/restore since
> the interrupt latency is probably so fast that the operation would have 
> to be shut down.

Your bus error handler will be an interrupt service routine; it does not 
know which instruction caused the Bus Error to occur, so it cannot fix 
any problems that may arise from the fault.  It might try suspending the 
task that was running at the time that the ISR was entered, but it might 
suspend the wrong task.  To be completely safe, the only thing it could 
do would be to dump as much status as possible and halt or reboot 
without returning.

> > If the Bus Error occurs during a DMA operation using one of the DMA 
> > controllers in the Tempe chip then the DMA will be stopped immediately 
> > instead, since the controller is inside the Tempe and can see the Bus 
> > Error status. 
>
> Do you mean the Tempe chip has its own DMA?
> I do'nt have any datasheet regarding the Tempe chip.

The Tempe chip has 2 DMA controllers on it.  You can download a copy of 
the programmers manual from Tundra's website - you will probably have to 
fill in an online web form to get access, but they don't make you sign 
an NDA.

- Andrew
--
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