Experimental Physics and
Industrial Control System

Peter Milne <[email protected]> · Fri, 8 Dec 2017 09:10:34 +0000

Hello Matt

Your table lists 7 columns for 7 subsystems, but it was OK or even

desirable to fit it all in one box?

May I promote one of our products for this:

ACQ2106: ZYNQ7030 SOC, embedded Linux, EPICS IOC on board,  GigEth:
a single 1U x 19" box with 6 payload sites.

Example Payload
ADC38 : 2 x ACQ424ELF-32 : 64 channels simultaneous AI
DAC6 : 1 x AO424ELF-16 : 16 channels simultaneous AO
DI14,DO35 : 2 x DIO432ELF-32 : 64 DIO, set direction in octets.

Leaving one site free for expansion.

http://www.d-tacq.com/details_page.php?prod_id=modproducts&page_id=2
http://www.d-tacq.com/images/ACQ2106+4xACQ425ELF-16-2000-web.jpg
http://www.d-tacq.com/acq400ds/acq424elf-product-specification.pdf

System cost: under $15K.

The ACQ424ELF-32 is somewhat overspec at 1000kSPS/channel, but we're

planning a lower cost module at 200kSPS/channel, available Q2 2018 that

may be a better match.

Best regards

Peter.

On 07/12/17 22:29, Matt Rippa wrote:

Hi all,

Thanks for the replies.

Here's more info:

Can you describe a bit more the specifications and how it operates?

- How many inputs at 5 kHz?

Attached is a cut sheet. There's 38 analog and 14 TTL inputs.

- How much calculation to determine the outputs?

We have two core processing tasks for mirror position and vibration control.
This results in a total of 5, 3x3 matrix vector multiplies per cycle. This
is to
transform for linear sensor space to AZ/EL tip tilt coordinates.

The legacy DSP's are TI-TMS320.

- How many outputs to be written, and at what rate?

All the stepper motor control is implemented with TTL lines. So a 20 Hz
stepper clock
is realized by skipping sufficient 200 us cycles to generate the clock.
Again, the IO cut sheet shows this as 35 outputs. But only the motors are
using the sample rate.

- Is this just for feedback control, or do you need to log the inputs and
if so at what rate?

I'm keen on logging inputs up to the sample rate in an engineering mode
if it's easy to do.
This would be very useful for tuning the system. At a minimum I'd want to
log the inputs at
1 kHz. The closed loop bandwidth of the system is about 100 Hz.

I have a wealth of information if you're interested to understand this
better.

-Matt

Mark

________________________________
From: [email protected] <[email protected]> on
behalf of Matt Rippa <[email protected]>
Sent: Wednesday, December 6, 2017 2:54 PM
To: Talk EPICS Tech
Cc: Rolando Rogers
Subject: Recommendations for EPICS Based Data Acquisition System

Aloha,

I'm looking for your recommendations on the latest data acquisition
hardware, compatible with EPICS.

Our Secondary Mirror system at Gemini has a 1 meter diameter,
55 kg mass. There's 3 degrees of freedom and a 5 kHz control loop.
The system was designed in the 90's by Lockheed Martin, based on
a DOS PC with an ISA backplane (PICMG 1.0) and a DSP data
acquisition board with 16 bit ADC's and DAC's. The DOS PC interfaces
with an EPICS IOC via Reflected Memory.

In 2010 I did a conceptual redesign based on a Hytec Blade 9010 using
IP cards and an Intel CPU running RTEMS. Today it seems FPGA's are
a popular choice for data acquisition. Perhaps a Xylinx zynq solution?
Would anyone still consider VME?

I have no requirement for 5 kHz EPICS control.  Although that's intriguing.

Thanks for your time.

-Matt

--
Peter Milne
Director of Sales
www.d-tacq.com

Experimental Physics and Industrial Control System

Experimental Physics and
Industrial Control System