Hi,
When I try compiling the motor module for vxWorks-mpc8548 I get an "unknown bit order" error (see below).
It looks like the CPU type for vxWorks-mpc8548 is PPC32 because if I add PPC32 to the motor.h file, it compiles ok.
I set the bit fields to be packed MSB first. Is this correct?
/* Define, from top to bottom, how bit fields are packed. */
/* This works for gnu, SunPro, MS Visual C. */
#if defined(_WIN32) || defined(_M_IX86) || defined(_X86_)
#define LSB_First (TRUE) /* LSB is packed first. */
#elif defined(__i386__) || defined(_armv4l_) || defined(_X86_64_) || defined(__APPLE__)
#define LSB_First (TRUE) /* LSB is packed first. */
#elif defined(i386)
#define LSB_First (TRUE) /* LSB is packed first. */
#elif defined(sparc) || defined(m68k) || defined(powerpc)
#define MSB_First (TRUE) /* MSB is packed first. */
#elif (CPU == PPC604) || (CPU == PPC603) || (CPU==PPC85XX) || (CPU == MC68040) || (CPU == PPC32) /***** I added PPC32 CPU type here *****/
#define MSB_First (TRUE) /* MSB is packed first. */
#else
#error: unknown bit order!
#endif
----------------------
Compile Error :
make -C O.vxWorks-mpc8548 -f ../Makefile TOP=../../.. T_A=vxWorks-mpc8548 install
make[3]: Entering directory `/afs/slac.stanford.edu/g/acctest/vol1/epics/modules/R3-14-12/motor/MAIN_TRUNK/motorApp/MotorSrc/O.vxWorks-mpc8548'
/afs/slac/package/vxworks/devel/6.8/gnu/4.1.2-vxworks-6.8/x86-linux2/bin/ccppc -c -DCPU=PPC32 -DvxWorks -DvxWorks -DBSD=44 -include /afs/slac/package/vxworks/devel/6.8/vxworks-6.8/target/h/vxWorks.h -g -Wall -DCPU_VARIANT=_ppc85XX_e500v2 -te500v2 -mlongcall -fno-builtin -fno-builtin -DBSD=44 -MMD -I. -I../O.Common -I. -I.. -I../../../include/os/vxWorks -I../../../include -I/afs/slac/g/acctest/epics/modules/R3-14-12/ipac/ipac-R2-11-lcls1/include -I/afs/slac/g/acctest/epics/modules/R3-14-12/asyn/asyn-R4-18-lcls1/include -I/afs/slac/g/acctest/epics/modules/R3-14-12/seq/seq-R2-1-3-lcls1/include -I/afs/slac/g/acctest/epics/base/base-R3-14-12/include/os/vxWorks -I/afs/slac/g/acctest/epics/base/base-R3-14-12/include -I/afs/slac/package/vxworks/devel/6.8/vxworks-6.8/target/h -I/afs/slac/package/vxworks/devel/6.8/vxworks-6.8/target/h/wrn/coreip ../motorRecord.cc
In file included from ../motorRecord.cc:177:
../motor.h:143:6: error: #error : unknown bit order!
make[3]: *** [motorRecord.o] Error 1
make[3]: Leaving directory `/afs/slac.stanford.edu/g/acctest/vol1/epics/modules/R3-14-12/motor/MAIN_TRUNK/motorApp/MotorSrc/O.vxWorks-mpc8548'
make[2]: *** [install.vxWorks-mpc8548] Error 2
make[2]: Leaving directory `/afs/slac.stanford.edu/g/acctest/vol1/epics/modules/R3-14-12/motor/MAIN_TRUNK/motorApp/MotorSrc'
make[1]: *** [MotorSrc.install] Error 2
make[1]: Leaving directory `/afs/slac.stanford.edu/g/acctest/vol1/epics/modules/R3-14-12/motor/MAIN_TRUNK/motorApp'
make: *** [motorApp.install] Error 2
Thanks,
Nia Fong
ICD Software
650-926-6215
[email protected]
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