Andrew Johnson wrote :
> The Raven will be capable of detecting and reporting the following
errors
> to one or more MPC masters:
> * MPC address bus time-out
> * PCI master signalled master abort
> * PCI master received target abort
> * PCI parity error
> * PCI system error
> Each MERST error bit may be programmed to generate a machine check
> and/or a standard interrupt.
According to the document, Discovery chips do provide four hardware
signals which can detect the above errors (except for the MPC address
bus time-out). Those signals could have been wired to the MCP
(machine Check) input of the PowerPC processor. In case of
error detection, address and data are latched in specific registers
for debugging as well. I have been waiting for Motorola to verify how
the MCP signals are wired on the MVME5500 and MVME6100 boards.
Regards,
Kate
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