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<== Date ==> <== Thread ==>

Subject: Re: ARM - EPICS performance evaluation
From: Emmanuel Mayssat <emayssat@yahoo.com>
To: Emmanuel Mayssat <emayssat@yahoo.com>, Peter Jemian <jemian@anl.gov>, "sinclairjw@ornl.gov" <sinclairjw@ornl.gov>
Cc: "tech-talk@aps.anl.gov" <tech-talk@aps.anl.gov>
Date: Mon, 19 Mar 2012 10:37:02 -0700 (PDT)
The link I initially sent is referring to the arduino. Not the ts7370...
Unless you are talking about another link.

Also, ARM OS are not real time.
That means you can have latency between successive samples. (that's another issue, not discussed so far)
I believe there is a way to use hardware interrupt.
The 4ms is observed at the epics layer (asyn driver + display on a remote OPI)
I probably tested it at the OS level (simple C loop program), but I can't remember, that was some time ago.

The ADC is not in the CPU and the ARM clock (200MHz for this model) is misleading and irrelevant.
I didn't come up with that number though, one of my electronic coworker did.
I can just ascertain that IOs are issues for ARM platforms.

Since there are several of you working on ts7xxx ARM (based on the few emails I received),
maybe someone can back up that claim. I am probably wrong ;-)

--
E


From: Emmanuel Mayssat <emayssat@yahoo.com>
To: Peter Jemian <jemian@anl.gov>; "sinclairjw@ornl.gov" <sinclairjw@ornl.gov>
Cc: "tech-talk@aps.anl.gov" <tech-talk@aps.anl.gov>
Sent: Monday, March 19, 2012 10:00 AM
Subject: Re: ARM - EPICS performance evaluation

Pete,
What is that link?
--
E


From: Peter Jemian <jemian@anl.gov>
To: sinclairjw@ornl.gov
Cc: tech-talk@aps.anl.gov
Sent: Saturday, March 17, 2012 8:03 AM
Subject: Re: ARM - EPICS performance evaluation


Follow that google.com link and you will see the context of the 4 ms interval.  The article shows how it can go faster.

Pete





References:
Re: ARM - EPICS performance evaluation Peter Jemian
Re: ARM - EPICS performance evaluation Emmanuel Mayssat

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