Isn't DMA a distinct advantage with running EPICS and FPGA on the same
silicon? Gives hardware-level access to data and allows for interrupts
to the OS from the FPGA.
Pete
(The one who does not program FPGA, just listens to others.)
On 6/2/2021 10:49 AM, Till Straumann via Tech-talk wrote:
Raj.
Regarding network security: most facilities use firewalls and isolated
network segments
for security.
This is orthogonal to your question - EPICS is not particularly secure
(but neither is your
proprietary UDP protocol going to be).
Re. maintenance: yes, you will have to maintain EPICS on an additional
target platform.
However, the zynq/arm target is well supported and I wouldn't expect any
particular
problems. On the upside: you *only* have to support EPICS and won't have
to maintain/support
your proprietary solution in addition to EPICS.
Again: communicating with hardware and providing a standardized
networking interface
(channel-access) is pretty much the definition of an IOC under EPICS.
If IOC system load due to many clients is a concern then that is
traditionally mitigated with
a channel-access gateway.
HTH
- Till
On 6/1/21 11:17 PM, Kunjir, Shriraj wrote:
Hi Till,
Thank you for your response. Could you please elaborate on the
maintenance and network security aspect of such an LLRF controller
when it runs IOC on its PS side Linux?
We are evaluating the potential of running IOC on our Zynq based LLRF
controllers.
*From: *Till Straumann via Tech-talk <mailto:tech-talk at aps.anl.gov>
*Sent: *Tuesday, June 1, 2021 5:09 PM
*To: *tech-talk at aps.anl.gov <mailto:tech-talk at aps.anl.gov>
*Subject: *Re: Advantages of running IOC on FPGA
*[EXTERNAL] This email originated from outside of FRIB*
I'd say that the 'traditionally' an IOC *is* actually executed on a
front-end controller
with EPICS taking care of networking and control-system integration.
This is what
EPICS was originally designed for. (IOCs running on embedded VME
computer that
were directly talking to hardware).
When you don't run an IOC on the Zynq then you have to invent your
proprietary
UDP protocol, write some sort of server that does I/O on the Zynq and
some protocol
translation to EPICS on the 'IOC server'.
FPGA <-> ZYNQ (I/O -> UDP) <-> ethernet <-> server (UDP -> EPICS)
You can eliminate all this effort simply by running an IOC on the zynq.
Cheers
- Till
On 6/1/21 10:14 PM, Kunjir, Shriraj via Tech-talk wrote:
Hello,
Could you please help in understanding the advantages of running IOC
server on LLRF Zynq FPGA over the traditional method of a standalone
IOC server connecting to LLRF FPGA via UDP. Thank you
Raj
--
----------------------------------------------------------
Pete R. Jemian, Ph.D. <jemian at anl.gov>
Beam line Controls and Data Acquisition (BC, aka BCDA)
Advanced Photon Source, Argonne National Laboratory
Argonne, IL 60439 630 - 252 - 3189
-----------------------------------------------------------
Education is the one thing for which people
are willing to pay yet not receive.
-----------------------------------------------------------
- References:
- Advantages of running IOC on FPGA Kunjir, Shriraj via Tech-talk
- Re: Advantages of running IOC on FPGA Till Straumann via Tech-talk
- RE: Advantages of running IOC on FPGA Kunjir, Shriraj via Tech-talk
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