Experimental Physics and
This page provides a repository for information about building EPICS for use with the RTEMS real-time operating system. If you find any other information that ought to go on this page, please let me know.
Operating System and Tools
Since the standard RTEMS toolset uses the GNU Compiler Collection (GCC), software using RTEMS can be cross-compiled from a number of development host operating systems including GNU/Linux, FreeBSD, Cygwin, and Solaris. RTEMS supports many more target CPU types than have been tested with EPICS, so additional EPICS configuration files will be needed to support new architectures, but these should not be hard to write if/when they are required.
Building RTEMS and Tools
The RTEMS Source Builder (RSB) is a python script that will download and build the compiler tools and RTEMS OS automatically from source, and can be run on many different host operating systems. The RSB wiki page gives some hints on getting started, and notes for users of CentOS and similar host operating systems that might need to build a version of texinfo for use by RSB.
The RTEMS Source Builder (RSB) described above automates the steps detailed in the tutorial below.
Introductory Tutorial (OLD)
Eric Norum who is responsible for the original port of EPICS to RTEMS has written a tutorial entitled Getting started with EPICS on RTEMS which is a good introduction on how to obtain and install the software necessary to build RTEMS (version 4.9.2) for EPICS. This is also available as a printable PDF file.
A brief set of instructions for building RTEMS 4.10.2 derived from the above tutorial can be found here.
Visit Till Strauman's RTEMS @ SSRL page for additional software that can be installed to make the RTEMS runtime environment look very similar to vxWorks.
An old RTEMS at NSLS page points to a BSP for the Motorola MVME5500 and a copy of synApps for RTEMS.
Arcturus uCDIMM ColdFire 5282
Eric Norum has written a step-by-step guide to creating a simple EPICS application for an Arcturus uCDIMM ColdFire 5282 module attached to an Altera FPGA development kit.
|ANJ, 29 Oct 2014||
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