Experimental Physics and
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Andrew Johnson wrote about mvme6100: All the EPICS VME drivers that I know assume that they have memory mapped I/O to the VME card and thus do not make an OS or BSP call to perform read or write cycles on the VME bus. If they *did* call an OS or BSP routine then it would be possible for a Tsi148 driver to intercept all such I/O operations and perform the necessary checks afterwards. However since they don't (most EPICS drivers create a struct that directly maps to the board registers and use a pointer to that struct to calculate the register address) the above requirement would need major changes to every driver to properly handle the issue of getting a bus error. This doesn't mean that the existing drivers won't work; the vast majority of the time they will be fine. They will not be robust in the presence of unexpected bus errors though. - clearly not something conducive to good I/O performance, and not compatible with any existing EPICS drivers. 2eSST is not relevent to the programmed I/O operations I was talking about above. The issue of bus errors occurring during a DMA transfer are dealt with using a different mechanism which should be fine on the Tempe chip. - Andrew -- There is considerable overlap between the intelligence of the smartest bears and the dumbest tourists. -- Yosemite National Park Ranger
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ANJ, 02 Sep 2010 |
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