I have a question to those using the 80 MHz version of the ColdFire
uCDIMM 5282. How do you connect this to external logic such as an
FPGA? Here's the bus timing section of the data sheet:Attachment:
pastedGraphic.pdf
Description: Adobe PDF document
This implies that external logic must assert TA within 2.5 ns (Time B0
minus time B1a) of the rising edge of CLKOUT. WIth the 64 MHz part
this requirement was 5.625 ns, which wasn't easy to reach, but was
possible.
Do you do some tricky stuff like use the falling edge of CLKOUT to
clock the section of the FPGA that drives the ColdFire TA* pin?
--
Eric Norum <[email protected]>
Advanced Photon Source
Argonne National Laboratory
(630) 252-4793
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