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<== Date ==> <== Thread ==>

Subject: motorRecord on linux-arm
From: Jens.Eden@ptb.de
To: tech-talk@aps.anl.gov
Date: Fri, 7 Feb 2014 16:21:55 +0100
I recently tried to run a motor on a Raspberry Pi and found that the DMOV 
field would never
return to 1 after the move completed. The reason is, that the following 
cpu-architecture
switch in motor.h doesn't have an entry for armv6

#if defined(_WIN32) || defined(_M_IX86) || defined(_X86_)
    #define LSB_First (TRUE)  /* LSB is packed first. */
#elif defined(__i386__) || defined(_armv4l_) || defined(_X86_64_) || 
defined(__APPLE__)
    #define LSB_First (TRUE)  /* LSB is packed first. */
#elif defined(i386)
    #define LSB_First (TRUE)  /* LSB is packed first. */ 
#elif defined(sparc) || defined(m68k) || defined(powerpc)
    #define MSB_First (TRUE)  /* MSB is packed first. */
#elif (CPU == PPC604) || (CPU == PPC603) || (CPU == PPC85XX) || (CPU == 
MC68040) || (CPU == PPC32)
    #define MSB_First (TRUE)  /* MSB is packed first. */
#else
    #error: unknown bit order!
#endif

Since (CPU == PPC604) is true for all cases where CPU is undefined, the 
arm compiler did not
fall through to the error message in the else case.

I suggest to remove the switch and replace the occurrence of  MSB_First 
with the EPICS
provided endianness switch:
+#include <epicsEndian.h>

-#ifdef MSB_First
+#if (EPICS_BYTE_ORDER == EPICS_ENDIAN_BIG)

Jens


Replies:
RE: motorRecord on linux-arm Mark Rivers
Re: motorRecord on linux-arm Ron Sluiter
Re: motorRecord on linux-arm Till Straumann

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